Basestar FV-1 dev board


After using my old (designed around 2010 - see the picture on the right) Spin FV-1 dev board for the last few years i finally decided i need something more sophisticated. Wheter it was that or maybe my increased interest in Cypress PSOC microcontrollers, it pushed me to design a new, modern and better equipped development base for the very nice  DSP made by Spin Semiconductor.
FV-1 dev board

Basestar FV-1, inspired by one of my favourite series of all times  is a part of a larger modular DSP development system, including Dev_LOOP, which is used as an analog IO board (impedance matching, level adjustment, mixer, stereo/mono routing).

Another goal of designing the new FV-1 dev board was to exploit a few tricks in order to get more control inputs. Besides the usual 3 CV inputs (POT0-2) the board can generate a modulated square wave signal, which fed into one of the audio ADC inputs can be translated into a quickly updated fourth way of controlling the parameters. Of course, having that option i couldn't resist and added a multi waveform LFO section which opens up a lot more possibilities.

The boards uses capacitive sensing push buttons instead of mechanic ones, continuous parameters are controlled via traditional pots. The main controller doing all the houskeeping work is Cypress PSoC4200 series MCU (CY8CKIT-049). Data is displayed on a small I2C driven OLED.


Below is the list of currently implemented features.

Buttons:

  • Prog# +/- DSP program number (1-8),
  • LFO Wave - one of the 7 available LFO waveforms:
    1. Sin 5. Hypertriangular
    2. Triangle 6. Random Step
    3. Ramp Up 7. Square
    4. Ramp Down  
  • LFO ON/OFF
  • DSP Bypass - controls the relay based DSP bypass system, 3 settings:
    1. OFF
    2. Tails (DSP input muted)
    3. ON
  • DACR Readout - a special mode, which may come handy while working on a new DSP programs. When activated, it mutes the Right output audio channel and reroutes the DACR output to one of the ADC channels on the microcontroller. The value is sampled and displayed as a bargraph. This feature can be used to monitor any parameter value sent to the DACR output on the DSP.
  • Fsamp +/-  DSP clock value, 7 available settings:
    1. 11 kHz 5. 44 kHz
    2. 16 kHz 6. 48 kHz
    3. 22 kHz 7. 52kHz
    4. 32 kHz  

Pots:

  • POT0-2 - standard FV-1 control inputs
  • POT3 - controls the amplitude of the square wave generator, fed into ADCR can be used as 4th control input. Also, controls the bias of the waveform if the LFO is activated
  • LFO Speed - 0-10Hz LFO rate control
  • LFO Depth

Power IO:

  • PWR IN - DC 5.5/2.1 center negative jack, 5-9VDC input
  • PWR SLAVE - direct thru jack to send the power to other modules (ie. the analog IO)

Analog IO:

IDC10 connector carrying stereo in and out signals, compatible with Dev_LOOP audio connector.


Digital IO:

  • External I2C programmer - used to connect an external I2C EEPROM programmer and reset the DSP after updating the firmware
  • MiniPROG SWD - 5pin connector for Cypress MiniPROG debugger
  • USB - part of the CY8CKIT-049 kit, provides an USB to UART bridge

Jumpers:

  • INT/EXT - internal or external DSP program bank
  • ADCR Source - selects the signal routed to the ADCR input - default audio R channel or POT3 control signal
  • EEP PROG Enable - allows/denies  the access to the I2C bus

Test points:

  • L and R input audio signal
  • L and R output audio signal
  • POT3 control signal (amplitude modulated square wave)
  • GND for reference

Basestar FV-1


System:

The board is designed as a part of modular DSP development system including the following components:

  • Basestar FV-1 dev board,
  • Dev_LOOP analog IO front end,
  • FV-1 EEPROM Programmer, described >>here<<.

FV-1 Dev System


Operation modes:

Default stereo mode

Both channels are used to process two audio channels.

Normal operation

DACR readout mode

Special mode used to monitor the value of any variable used in the DSP program. The output of the DACR will be sampled and displayed as bargraph allowing to observe that value while the DSP program is running. 

DACR readout mode

4th control input/LFO

Right audio channel can be used as a 4th control input. Since the input is sampled at the audio sampling rate, the parameter update is much faster than using the default POT0-2 inputs, which opens up a few more options like an external LFO.
The audio inputs on the FV-1 are biased at Vdd/2 and expect an AC signal. To use it as control input the signal has to be AC, too. The board has its own square wave oscillator with it's amplitude controlled by the POT3 or LFO, if engaged, fed into the ADCR (use the ADCR Source jumper to activate that option):

4th control input mode

To make a use of the ADCR control input in your program the AC signal has to be converted into DC by using a simple envelope follower. Here is an example code snippet:

equ POT3    reg0    ;POT3 = 4th control input
equ POT3flt reg1    ;POT3 filter reg
                    ;ensure ACC is empty
rdax ADCR,1.0       ;read ADCR into ACC
absa                ;|ACC|
rdfx POT3flt,0.0005 ;filter 
wrlx POT3flt,-1     ;the envelope
wrax POT3,0         ;POT3 ready to use

Design files:

All the design files, including schematic, PCB gerbers, assembly guides and BOM are
>>HERE<< (Github repository)


Building hints:

  • Most of the components are SMT, use 1nF C0G type capacitors in the anti aliasing filter sections. The pads used for the passive components are larger to make the hand soldering easier. Besides, a nice looking Cylon lady will assist you while populating the bottom layer of the board :)
  • Cypress Cy8CKIT-049-42xx MCU kit requires a few modifications (removing not used/required components) before it can be used with the board. These mods can be performed after programming the chip.
  • There are many variations of the I2C OLED on the market. Some of them have the VCC and GND pins swapped. The board provides two OLED Power Config jumpers to match the pinout of your display. Make sure you use the correct one! Otherwise you may damage the display.
  • The 4066 quad switch is optional only (will be used in the future) and should not be installed with the current firmware version. Put a blob of solder on the JP1 and JP2 jumpers to bypass the chip.
  • The "CLIP" led will most like go on when using the POT3 and LFO features. The reason for that is the control oscillator generates a full swing waveform at max setting which triggers the FV-1's internal clip detector.

Firmware versions:

  • Bootloadable - use this version with the original Cypress UART bootloader, which is written into the MCU at the factory. Due to the way the bootloader works (checks the main program firmware checksum at boot up) some functions  were not possible to implement. Mainly, the unit does not save the last used parameters as DSP Program number and LFO waveform. This feature uses an emulated EEPROM (stores the variables in the Flash memory). Obviously, after writing a new value in the Flash section the firmware checkusm will change. As a result the bootloader will not start the main program after the boot up.  Use the Cypress Bootloader Host  program (part of the PSoC Creator IDE) with that firmware version if you do not have any other way to program the chip.
  • Kitprog/MiniProg - this version is intended to use with a Kitprog or MiniProg programmers and is recommended if you want to have full set of features. The KitProg is a part of other Cypress dev kits (CY8CKIT-043, CY8CKIT-059) available at a very reasonable price (~$10). Use a PSoC Programmer software to upload the firmware.

Boards:

BasestarFV-1 PCB

I still have a few PCBs left, contact me if you are interested in getting one.


Demo videos / Sound Samples: